1. Field
It is related to a semiconductor memory device and a method for controlling a semiconductor memory device.
2. Description of the Related Art
A semiconductor integrated circuit typically includes a non-volatile semiconductor memory device, such as an EEPROM (electrically erasable programmable ROM) and a flash memory, for storing various setting values. For example, Japanese Laid-Open Patent Publication No. 2005-20349 describes a semiconductor integrated circuit that writes adjustment data to a rewritable non-volatile memory (refer to FIG. 1 of the publication).
A non-volatile semiconductor memory device must include circuits for erasing data, such as a circuit for applying negative voltage and a circuit for applying erasure voltage. For example, Japanese Laid-Open Patent Publication No. 2002-118187 describes a conventional non-volatile memory (refer to FIG. 5 of the publication). The conventional non-volatile memory is coupled to word lines W1 to W4, which form a memory array. The non-volatile memory includes a negative voltage application circuit NEG and an erasure voltage application circuit ED. The negative voltage application circuit NEG applies negative voltage to each of the word lines W1 to W4 during data erasure. The erasure voltage application circuit ED applies positive voltage to memory cells M1 to M16 during data erasure. Each of the memory cells M1 to M16 has a floating gate. To erase data from the memory cells M1 to M16, negative voltage is applied to the control gate of each of the memory cells M1 to M16 and positive voltage is applied to the source of each of the memory cells M1 to M16. A potential difference between the positive voltage and the negative voltage applied to the control gate and the source of each memory cell causes electrons, which are held in the floating gate of each memory cell, to move to the source region through Fowler-Nordheim tunneling.
The capacity of a memory mounted on a large-scale integrated (LSI) circuit is set in accordance with the amount of data that is stored. The amount of the data, such as mode setting values for the LSI circuit and clock frequency setting values for a phase-locked loop (PLL) circuit is normally small. Thus, the capacity of a non-volatile semiconductor memory device may be small. However, the conventional non-volatile semiconductor memory device described above includes the negative voltage application circuit NEG and the erasure voltage application circuit ED, which are used to erase data. The negative voltage application circuit NEG incorporates a capacitor and thus has a large circuit size. In other words, the negative voltage application circuit occupies a large portion of the entire circuit area for the non-volatile semiconductor memory device. Since the negative voltage application circuit occupies a large area, the non-volatile semiconductor memory device cannot be miniaturized and power consumption cannot be reduced.